| Requirements:
| Five (approx.) assignments counting a total of 50 percent, 5 points
per class day penalty if late, max of 25 points;
Two tests counting 15 percent each (total of 30);
A final exam counting 15 percent;
Attendance, class participation and deportment: 5 percent.
Classes: Classes are lecture format. Cell phones, pagers, laptops and PDA's may not be used.
| Makeup Tests | Makeup tests will be given only in
cases of demonstrated need for causes such as serious illness,
family emergency or University sanctioned schedule conflict.
In all cases, written documentation will be required.
| | Test dates
| Test 1: Friday Feb 29.
Test 2: Friday April 4
Final: See Registrar Page
|
Final Grades
|
Final grades will not be available via email. If you want your
grade mailed to you, bring a self addressed, stamped envelope
to the final.
| | Originality
| If your work duplicates in whole or in part the work of someone
else, both works will receive a grade of 0.
| | Notes on IBM Assmebly Language
| IBM Mainframe Assembly
| |
Homework
|
All homework must have a comment block giving your anme and the
assignmnet number. All pages must be stapled - no paper clips
or clever corner folding. Assignment s not complying will
be returned ungraded.
What to turn in: the program (xxx.mlc) and the output.
You can capture the output of a program with:
myprog > outfile
-
Write an assembly language program that will sum the first 10 integers
(beginning at 1) and print the total.
Use the following code as an example:
PRINT NOGEN
BEGIN BEGIN
REGS
L R3,FIVE
A R3,THREE
CVD R3,DBL
ED RESULT,DBL+6
WTO RESULT
RETURN
LTORG
FIVE DC F'5'
THREE DC F'3'
RESULT DC X'40202120'
DBL DC D'0'
END BEGIN
The code above loads 5 into R3 then adds 3 to it then prints the result.
The constants 3 and 5 are at the labels FIVE and THREE.
The CVD instruction converts the binary in R3 to an intermediate
forme known as PACKED DECIMAL. The ED instruction converts the
PACKED DECIMAL to printable characters. The WTO macro writes
the result. The initial value in the string RESULT is a pattern
which tells the ED instruction how to do the conversion.
The LTORG tells the assmebler to place literals at this point.
Due: Wednesday Feb 6.
-
Write a program to add the number 2 to a register
10 times and then print the result.
One way to have a loop in assembly language is to load
a register with a count and, at the end of the loop,
decrement the value in the register by one. If the
value is still greater than zero, branch (goto) the
top of the loop. For example:
L R2,TEN
TOP instructions
in the
loop
go here
S R2,ONE
C R2,ZERO
BNE TOP
.
.
.
ONE DC F'1'
TEN DC F'10'
ZERO DC F'0'
In the example, R2 is loaded with the value 10.
The top of the loop has the label TOP. At the bottom,
ONE is subtracted from R2. The C (compare) instruction
compares the contents of R2 with ZERO. The Branch Not
Equal (BNE) instruction branches to TOP if the R2 is not
ZERO. If the R2 is equal to ZERO, the instruction after the
BNE is executed next.
Modify the code as follows:
- Before the loop, zero R3 (SR R3,R3 - subtract it from itself).
- In the loop, add 2 to R3 (10 times)
- Print the result.
Due: Fri Feb 15.
-
IBM MANUAL says:
BCTR R1,R2 [RR]
BCT R1,D2(X2,B2) [RX]
A one is subtracted from the first operand, and the result is placed at
the first-operand location. The first operand and result are treated as
32-bit binary integers, with overflow ignored. When the result is zero,
normal instruction sequencing proceeds with the updated instruction
address. When the result is not zero, the instruction address in the
current PSW is replaced by the branch address.
In the RX format, the second-operand address is used as the branch address.
In the RR format, the contents of general register R2 are used to generate
the branch address; however, when the R2 field is zero, the operation is
performed without branching. The branch address is computed before general
register R1 is changed.
LA R1,D2(X2,B2) [RX]
The address specified by the X2, B2, and D2 fields is placed in general
register R1. The address computation follows the rules for address
arithmetic.
Take the previous program and replace the subtract, compare, branch with a BCTR and
an LA (note: the LA will be done before entering the loop and load a register with
the address of the top of the loop. This register will be used as the second operand
of the BCTR.
Due: Fri Feb 22.
-
Add an array of numbers. This is often don by loading the address of the
first number into a register, using it to access (address) the operand
then incrementing it by the size of the operand and repeating.
The register becomes a pointer:
-
Build a table of data after your LTORG:
TAB DC F'1'
DC F'2'
DC F'3'
DC F'4'
DC F'5'
DC F'6'
DC F'7'
DC F'8'
DC F'9'
DC F'10'
-
Before your loop:
- load the address of TAB into a register
- load 10 into a register
- load the address of the first line of your loop into a register
- zero out a register
- loop 10 time as before but, for the A (add) instruction, use:
A Rx,0(R0,Ry)
where Rx is the register your are summing into (your choice - probably R3),
and Ry is the register you loaded the address of TAB into.
-
After the add, increment the register containing the address of TAB by
4:
A Ry,FOUR
where FOUR is a label on a DC statement initialized to 4.
-
When the loop ends, print the result.
Due Wednesday March 5.
-
The instructions SRA and SLA are the shift right arithmetic and shift
left arithmetic operations. They are RX instructions. The contents
of the register specified as the first operand are shifted either
left or right by the amount specified by the second operand
(the D2(X2,B2). However, rather than pointing to memory, the
second operand value is merely calculated by adding the
contents of the X2, B2 and D2 (except if X2 or B2 is R0,
in which case, they do not contribute to the arithmetic.)
For example:
SLA R3,10(R0,R0)
shiftes the contents of R3 to the right by ten bit positions.
Take your loop program from above and remove the Add instruction
and replace it with:
SLA R3,1(0,0)
Load R3 with 1 outside the loop. Loop ten times and print the result
for each iteration.
Note: because the ED instruction replaces the pattern with the answer
each time it is executed, you need to move a fresh version of the
pattern into RESULT each time before you execute the ED:
CVD R3,DBL
MVC RESULT(4),=X'40202120'
ED RESULT,DBL+6
WTO RESULT
The MVC moves characters. The figure =X'40202120' is
a shorthand way to specify a constant. The assembler will
do the DC statement for you and place it immediately
after the LTORG. These are called Literals and the
LTORG tells the assembler where to put them.
The MVC moves 4 bytes from the literal pattern into RESULT (two
hex digits to the byte).
(Note: there is an English word littoral which means coast or beach.
This is not the beach version...)
Loop ten times. What happens if you loop 32 times?
Due Wed March 26.
| | Book:
|
Tannenbaum, A. S., Structured Computer Organization, Pearson Prentice Hall,
ISBN 0-13-148521-0.
On-Line IBM S/390 Principles of Operation (free)
PC Assembly Language (free)
| | Simulator
| S/390 Simulator for Win9x (Zip File)
Create a directory named pc370. Copy this zip file to
that directory and unzip
| | Green Card |
Panels 1-3
Panels 4-6
Panel 7
Panels 8-10
Panels 11-13
Panel 14
| | Macros | Images
of class notes - IBM 390 Macros
| | Sparc | Images
of class notes - Sparc architecture
| | PDP-11 | Images
of class notes - PDP-11 architecture
| | RISC | Images
of class notes - RISC architecture
| | |